1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, to a semiconductor device manufactured by the manufacturing method, and to a jig for forming wiring.
2. Description of Background Art
In a three-dimensional integration technique of three-dimensionally stacking semiconductor chips, a so-called through-hole electrode (TSV: Through Silicon Via) is formed, for example, such that it penetrates through stacked semiconductor chips. Through such a through-hole electrode, electrical connection is established between vertically stacked semiconductor chips, and between a semiconductor chip and an electrode or the like on a substrate (see, for example, JP 06-291250 A). The entire contents of this publication are incorporated herein by reference.